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jaberjaber23/OpenLane

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Verilog Apache-2.0 main Stack scanned README.md
Stars
1
Forks
0
Watchers
1
Issues
0
Commits
58
Awesome lists
0

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Activity and growth

Tracked growth, recent movement, and commit velocity from stored repository snapshots.

Latest capture 2026-07-20 04:04

Star growth, last 7 days
0 0.0%
Commit velocity, last 7 days
0 0.0%
Stars since baseline
0
Snapshot coverage
50

Tracked growth

50 captures since 2026-06-04

Stars from baseline 0

Time horizon

All tracked data

Stars history

Total stars

Commits history

Default branch commits

Detected stack

Frameworks, package managers, ecosystems, and dependency manifests found during catalog scans.

Scanned 2026-07-20 04:04

Stack signals
1
Package managers
1
Manifest files
1
Dependencies
2

Frameworks and tools

  • pytest test framework · high confidence
pip python

Dependency files

1 manifest
  • test/requirements.txt python ecosystem, 2 dependencies

Classification

Searchable topics, generated tags, and stack labels that explain where this repository fits.

Topics
0
Tags
0
Stacks
1

Topics

No topics indexed.

Generated tags

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Stack labels

AI development signals

Agent instructions and tool configuration paths found in the repository tree.

0 paths
No AI development config files detected.

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Metadata

Language
Verilog
License
Apache-2.0
Default branch
main
Created
2026-01-26
First commit
2024-04-19
Last pushed
2026-01-26
GitHub updated
2026-03-09
Last synced
2026-07-20 04:04
Stack detected
2026-07-20 04:04
Archived
no

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